Christian Pilato and Fabrizio Ferrandi (Politecnico di Milano) are going to give a talk at the “Ottava giornata nazionale di Sintesi Logica” concerning the work done by Politecnico di Milano in the context of Synaptic. The presentation will be held at the Università degli Studi di Milano on Wednesday July 4, 2012.
Abstract: On recent deep sub-micron technologies, process variation can significantly affect the production of digital devices. Besides improving regularity at geometrical level, high-level regularity is becoming very attractive to improve manufacturing and parametric yields. This work presents a design methodology to target custom standard- cell libraries to improve the regularity of the resulting layout. It identifies a set of Boolean functions in the input designs and it aims at identifying the subset of cells that minimizes the area/power overhead.