Welcome to the SYNAPTIC project home page

This STREP project addresses Objective ICT-2009.3.2: “Design of Semiconductor Components and Electronic Based Miniaturised Systems” by development of “methods and tools to cope with the design challenges in the next generations of technologies” and focuses on the objective “design for manufacturability taking into account increased variability of new processes”.

In particular, the project targets the optimisation of manufacturability and the reduction of systematic variations in nanometer technologies through exploitation of regularity at the architectural, structural, and geometrical levels. We propose the creation of a methodology and associated suite of design tools which extract regularity at the architectural and structural level and automate the creation of regular compound cells which implement the functionality of the extracted templates.

The cell creation will employ Restricted Design Rules (RDR’s) and other regularity techniques at the geometrical level to maximise manufacturability and reduce systematic variations. Since the majority of designs in the nanometer regime employ some form of embedded SRAM, the project will include a study of the effects of RDR’s on SRAM in terms of performance and manufacturability and the subsequent definition of a set of RDR’s, which allow manufacturability optimisation for logic functions while remaining compatible with SRAM design rules.

To this end, we have assembled a consortium of leading academic, research and industrial experts with world class experience in regularity approaches at the various levels. The Synaptic consortium is composed of eight leading institutions, including four European technology companies, a European world-leading research institute in the field of nanoeletronics, and three academic institutions, two from Europe and one from Brazil. In order to ensure the successful commercialisation and deployment of the resulting tool suite the consortium includes a European EDA vendor with significant expertise in the field of design optimisation through automated cell creation. This project will enable European industry to play a leading role in the definition of next-generation design methodologies.

Acronym: Synaptic
Title: SYNthesis using Advanced Process Technology Integrated in regular Cells, IPs, architectures, and design platforms
Programme: FP7
Funding scheme: STREP
Starting date: 2009/11/02
Duration: 36 months
Call ID: FP7-ICT-2009-4

Press announcement of Synaptic project (Feb. 17, 2010)

Project poster: download

New project flyer: download

Project presentation: